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TC358746AXBG

TC358746AXBG

功能:TC358746AXBG是一颗将MIPI CSI to Parallel port and Parallel port to CSI的芯片,最高分辨率支持到1080P@60Hz

产品特征:

CSI-2 TX/RX Interface

MIPI CSI-2 compliant (Version 1.01 Revision 0.04 – 2 April 2009)

Configurable to TX or RX controller

Supports up to 1Gbps per data lane

Supports up to 4 data lanes

Supports video data formats

- RX: RAW8/10/12/14, YUV422 (CCIR/ITU 8/10-bit), RGB888/666/565 and User-Defined 8-bit

- TX: YUV422 (CCIR/ITU 8/10-bit), YUV444, RGB888/666/565 and RAW8/10/12/14

Parallel Port Interface

Supports data formats

24-bit bus – un-packed format (Both Input and Output mode)

RGB888/666/565, RAW8/10/12/14 and YUV422 8-bit (on 8/16-bit data bus) and 10-bit data formats.

YUV444 (Parallel Input mode only)

YUV422 8-bit – ITU BT.656 and ITU BT.601 (Parallel input mode only)

Up to 100 MHz PCLK frequency for Output mode, and 166 MHz for Input mode.

初始化接口:

2C Slave Interface (CS = L)

Support for normal (100KHz), fast mode (400 KHz) and special mode (1 MHz)

Configure all TC358746AXBG/TC358748XBG/TC358748IXBG internal registers

SPI Slave Interface (Only applicable in CSIOut configuration, MSEL = H, and CS = H)

SPI interface support for up to 25 MHz operation.

Configure all TC358746AXBG/TC358748XBG/TC358748IXBG internal registers

供电:

Core and MIPI D-PHY: 1.2V

I/O: 1.8V – 3.3V

功耗:

Parallel_In à CSI_Out, 500MHz CSICLk, 1080P @60fps 79.33Mw

CSI_In à Parallel_Out, 500MHz CSICLk, 100MHz PClk ColorBar @60fps 93.81 Mw

封装:BGA72

 

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Contact information
Address: Room 506, No. 230 Xixiang Avenue, Bao\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\'an District, Shenzhen
Tel: 0755-23359557
15013713572(微信同号)
Fax: 0755-23504001
E-mail: hp_zheng@xgzxwdz.com
Zip Code: 518034

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