TC358860XBG

TC358860XBG

功能：TC358860XBG是一颗将DP（EDP）信号转换成MIPI DSI(8lane)的芯片，最高分辨率支持到4K

产品特征：

EDP接口

Supports data formats：

RGB666and RGB888

AUX channel with nominal bit rate at 1 Mbps.

Absolute maximum pixel rate is 600 Mpixel/s.

Support REFCLK: 24,25,26 and 27 MHz.

MIPI接口：

（1）、支持Dual 4-Data Lane(8lane)，Maximum bit rate of 1 Gbps/lane

（2）、Interlaced video mode is not supported.

初始化接口：

● I 2 C Slave Port

Support for normal (100 kHz), fast (400 kHz or 1MHz, if SysClk is running at 25 MHz) modes.

External I2C master can access TC358860XBG internal and DPCD registers and read/write DSI panel register (via DSI link).

Address auto increment is supported.

TC358860XBG Slave Port address is 0x68,

(binary 1101_000x) where x = 1 for read and x =0 for write. The slave address can be changed to 0x0E (binary 0001_110x) by a weak pull up to pin HPD during boot time.

供电：

MIPI D-PHY 1.2 V

Core, MIPI D-PHY and eDP-PHY 1.1 V

eDP-PHY: 1.8 V

I/O: 1.8 V or 3.3 V (all IO pinsmust be same power level)

HPD Output Pad 1.8 V or 3.3 V

功耗：

Input 5.4 Gbps eDP 1 lane, Output DSI port 4 data lane, Full HD@60fps 126mW

封装：65-pin FBGA 5 x 5 mm 2